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[TenTec] OMNI VI "click/chirp"

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Subject: [TenTec] OMNI VI "click/chirp"
From: geraldj@isunet.net (Dr. Gerald N. Johnson, electrical engineer)
Date: Sun, 17 Feb 2002 10:03:56 -0600
Reading the 1999 ARRL Handbook description of internal timing I see some
explanation for a possible chirp and some solutions.

The handbook says that at key closure, the processor signals the
synthesized VFO and the BFO to shift frequencies, then waits 0.25
millisecond to assert the KEY OUT line. Then the PA, if present, may add
some delay to protect its relays and return the key edge to the KEY IN
line. Then the radio starts the ramp up for the RF.

If the frequency shift for the crystal BFO and/or synthesizer are not
complete (and small shifts of the synthesizer are generally accomplished
by shifting the reference crystal, though some pathologic frequencies
could require shifting the count in the PLL as well as shifting the
reference crystal), when the KEY IN signal starts ramping up output
there exists the possibility of a chirp. Delay inherent in relay PAs
could hide the chirp completely. Solid state QSK circuits (PIN diodes)
may not add enough delay to hide the chirp.

Seems to me that there are several possible variations between radios to
make some demonstrate the microchirp more than others. Primarily the Q
of the two shifted crystals and their oscillators. Crystal Qs can vary,
and transistor gains can vary a great deal leading to varying effective
circuit Q. A crystal has an inherent very high Q and that makes it
reluctant to change frequency. Higher Q crystals and higher gain
transistors should increase the circuit Q and slow the frequency shift
of the crystal oscillators. This high Q means lower phase noise which is
good. One might lower the Q of the crystal with a resistor shunting the
crystal if operating in parallel resonance, or a series resistor if
operating in series resonance to speed the shifting at the cost of
oscillator phase noise.

The synthesizer PLL loop can be a little slow if the loop filter
components are on the high side of their tolerance. This would be worse
with tantalum or aluminum electrolytics providing large value loop

Probably easier than modifying internal circuits, one might introduce a
make delay between KEY OUT and KEY IN. The simplest delay would be a
relay. A reed relay should proved a few milliseconds delay and an
armature relay should introduce about 10 milliseconds delay. A relay
will introduce audible keying noise in the shack and the delay on break
may keep the signal up when the processor is starting to shift the
oscillators back to their receive frequencies. That's just moving the
chirp from start to end of each code element, not necessarily progress.
It would be preferable to use something like a TLC555 timer and a bit of
logic to delay the MAKE without adding delay to BREAK. Likely a
millisecond of delay will be very sufficient. I've not detected the
microchirp so I can't be sure it will have been cured. I'd prove the
microchirp was cured using the simple relay, then create the necessary
quiet circuitry to accomplish the make only delay.

73, Jerry, K0CQ

Entire content copyright Dr. Gerald N. Johnson. Reproduction by
permission only.

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