Enough topband people have asked me for a list of the corrections to the
schematic in my PLL article that I hope Bill will allow me to use the
topband reflector to inform interested persons about these errors. Here
are the changes to be made:
In Figure 4, in the section of the schematic involving U1 and the adjacent
1/2 U2, the following corrections should be made:
1. the 1000 pF capacitor should be shown connected between pins 7 and
8 of U1.
2. the 47k resistor above 1/2 U2 should be connected between pins 6
and 7 of the 1/2 U2.
3. pin 8 of U1 is NOT connected to pin 6 of the 1/2 U2.
In addition, there is one other error which is not mentioned in my letter
to QEX:
4 there should be a 3k resistor in the line connecting the output of
the lower half U3 to the inverting input (pin 2) of the upper half U3.
My thanks to Don, N7AEU, for pointing out that last error.
73
Bob
VE3OSZ
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