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Re: [Amps] LDMOSFET questions for insiders

To: <amps@contesting.com>
Subject: Re: [Amps] LDMOSFET questions for insiders
From: "Doug Ronald" <doug@dougronald.com>
Date: Tue, 20 Nov 2018 10:57:03 -0800
List-post: <mailto:amps@contesting.com>
Ampleon has published on the topic, and is one of the few semiconductor
companies who specify their avalanche energy at least for the BLF188XR LDMOS
dual. They still use the UIS test which demonstrates that their LDMOS
transistor has substantially better absorbed single pulse energy than a
comparable VDMOS device. It also shows as you suspected, that avalanching
the device has implications beyond thermal. You might find the following
white paper has some useful information:
https://www.ampleon.com/documents/white-paper/AMP-WP-2017-0329.pdf
They also discuss the gate ESD diode's effects on class of operation when it
is forced into conduction - could possibly move a class C to A!

There are academic publications searchable through Google Scholar, but I
found all the IEEE Explore articles wanted mucho dinero, and others wanted a
registration and login to read more than the abstract...

-Doug, W6DSR

-----Original Message-----
From: Amps [mailto:amps-bounces@contesting.com] On Behalf Of Manfred
Mornhinweg
Sent: Monday, November 19, 2018 06:08
To: amps@contesting.com
Subject: Re: [Amps] LDMOSFET questions for insiders

Doug,

thanks for that link. What I take home from reading it is that I should
expect a somewhat reduced total dissipation capability when avalanching is
involved.

But doubts remain as to whether that fully applies to LDMOSFETs used in RF
amplifiers, and of course the actual avalanche energy and power ratings of
the specific LDMOSFETs I might use.

The paper is specific to VDMOSFETs operating in switched mode with inductive
loads. An LDMOSFET might behave differently (I don't know), and in RF
amplifier use there can be avalanching while the device is still partially
on. I would imagine that this is a particularly critical operating
condition, leading to lower avalanching specs than for inductive switching,
but I can't find any data on it.

Could it really be that nobody has ever investigated this and published on
it?

Manfred


> This app note gives some information on repetitive avalanche 
> ruggedness and unclamped inductive switching which may help...
> https://assets.nexperia.com/documents/application-note/AN10273.pdf


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