One cross reference for the IXYS transistor you mention is
STP4NK80Z. If you look at the ST datasheet, it shows the lower
dV/dt as applying to the MOSFET diode and two different circuits
for test/measurement of the main switching dV/dt and the diode
recovery. Does that help? I guess you would need to find some more
general data about the FETs to get detail about what the diode
slew rate limit means in practice.
Steve
> For example, take the data sheet for the IXFP3N80. This transistor is
> rated for a rise time of 14 ns, to slew from zero to 400V, under certain
> conditions of base drive and drain current. Assuming that the voltage
> ramp is linear, that would be a dv/dt of 28 V/ns. If the ramp is
> nonlinear, the peak dv/dt would be even larger. But this same
> transistor, in the same data sheet, is rated for an absolute maximum
> dv/dt of only 5 V/ns!
>
> The same discrepancy happens in the data sheets of many other MOSFETs. I
> don't know what I'm misunderstanding here, if perhaps that low absolute
> maximum dv/dt rating is valid under totally different conditions, or if
> these data sheets are simply wrong! I notice that many manufacturer
> specify either 5 or 10 V/ns of absolute maximum dv/dt, for transistors
> that actually seem to have very different rise times. Could it be that
> these dv/dt ratings are simply copied from one data sheet to the next,
> and do NOT reflect the true capability of each transistor?
>
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