> Parallel keying:
>
> TRlog Version 6.38, Kenwood TS850, Compaq 1235 Pentium
> 166 laptop and a MIT (Made in Taiwan) Pentium 166.
>
> Windows 95 on the 166 and 98 on the laptop.
>
> Keying:
>
> I'm having trouble (mentally) with the logic of strobe (pin 1) and
> pin 17 on both computers. There is 5V between pin 1 and 17 when not
> keying. Logically, to me anyway, this would turn on (key the xmtr)
> both a PNP transistor or the 4N35 Opto Isolator when not keying. When
> it is keying this level goes from 5V (for keyup) and to 0V for key
> down.
The trick here is that pin 1 goes low when you want to key and pin 17
goes high. This is something CT did in the old days and TR copied.
There are two or three reasons it is done this way:
1. Allows for a negative base voltage to assure that the transistor
is really off.
2. Keeps the rig from keying when the computer is reset.
3. Perhaps allows you to make an easier interface to a negative
keying radio.
So - when the computer is not keying - think of that 5 volts as
negative 5 volts.
> It's as if both computers had their logic upside down. The same thing
> is happening to the logic outputs of pins 2, 7, 8 and 9 used in
> band/antenna switching.
This I don't understand. Is it different than what the manual
says should be happening?
> Is there a setting in TR to correct this or have I missed the boat
> entirely?
No settings I know of to change it.
Tree
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