[AMPS] RE: FETAMP

[Peter Chadwick]

George,

What sort of Vdd are you thinking of? Accepted that a high Vdd has
advantages in a higher output impedance and somewhat lower currents
(presumably making transformers easier because the leakage inductance is
less critical), do you not have a problem with the input impedance dropping
because of Miller effect? Most of the power FETs seem to have a pretty big
input capacitance anyway, and the drain - gate feedback capacitances are not
negligible, so a larger drain voltage swing will  tend to increase the input
capacitance even more because of Miller effect, as well as dropping the
input resistance if the phase is at all awry (or sending it negative, which
is even worse!)

Is there thus any advantage in considering using two FETs in a cascode in
each side of the push pull amp? It also gives a bit more Vdd margin.

Is it possible to absorb the input capacity by means of a suitable low pass
network at the input with an impedance suitably low and a cut off frequency
above the highest input frequency? Obviously, the network would need careful
design - a Butterworth has quite a poor SWR well before cut off, but a
sharper cut off network might be advantageous.

Comments, anyone? 


73

Peter G3RZP


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