Hal said:
>This radio is built for the future.
In tomorrow's world -160dB(c) per cycle may actually be
a force to contend with......<
It may be, although I have severe doubts about the technology needed. This is
because, in the final analysis, low phase noise requires high power. S/N
becomes osc power over thermal plus implementation noise. Modern IC
technologies are pushing to smaller geometries, which mean lower voltages and
so SNRs are tending to drop. Implementing a DDS to go fast without needing a
BIG heatsink (e.g. the old Plessey SP2001 500MHz ECL DDS) becomes a bit of a
difficulty - you need to do it in CMOS. But reduced geometry CMOS has reduced
SNR, because of the lower voltage swings. It also has leakage problems, which
can also degrade SNR, as well as lead to higher current consumption - which is
why in the company I work in, we're still pretty well confining ourselves at
the moment to using 0.18 micron CMOS, especially as we need RF analogue
characterisation. In any case, until everyone else on the band has rigs of
equal performance, there's not that much advantage, and as far as IMD goes, for
the majority of people, need. See my 2002 QEX article.
73
Peter G3RZP
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